Searched refs:LPDDR3 (Results 1 – 22 of 22) sorted by relevance
| /u-boot/drivers/ram/rockchip/ |
| A D | Kconfig | 40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
|
| A D | sdram_rk3288.c | 254 case LPDDR3: in pctl_cfg()
323 case LPDDR3: in phy_cfg()
491 if (sdram_params->base.dramtype != LPDDR3) in data_training()
531 if (sdram_params->base.dramtype != LPDDR3) in data_training()
662 if (sdram_params->base.dramtype == LPDDR3) { in sdram_rank_bw_detect()
795 (sdram_params->base.dramtype == LPDDR3 && in sdram_init()
837 if (sdram_params->base.dramtype == LPDDR3) { in sdram_init()
876 if (sdram_params->base.dramtype == LPDDR3) { in sdram_init()
897 if (sdram_params->base.dramtype == LPDDR3) { in sdram_init()
|
| A D | sdram-px30-lpddr3-detect-333.inc | 28 .dramtype = LPDDR3,
|
| A D | sdram_px30.c | 294 if ((sdram_params->base.dramtype == LPDDR3 || in set_ctl_address_map()
521 if (sdram_params->base.dramtype == LPDDR3) in sdram_init_()
522 pctl_write_mr(dram->pctl, 3, 11, 3, LPDDR3); in sdram_init_()
536 if (sdram_params->base.dramtype == LPDDR3) { in sdram_init_()
|
| A D | sdram_common.c | 26 case LPDDR3: in sdram_print_dram_type()
294 } else if (dram_type == LPDDR3 || dram_type == LPDDR2) { in sdram_detect_dbw()
|
| A D | sdram_rk3188.c | 432 if (sdram_params->base.dramtype != LPDDR3) in data_training()
472 if (sdram_params->base.dramtype != LPDDR3) in data_training()
608 if (sdram_params->base.dramtype == LPDDR3) { in sdram_rank_bw_detect()
780 if (sdram_params->base.dramtype == LPDDR3) { in sdram_init()
|
| A D | sdram_rk3399.c | 373 } else if (params->base.dramtype == LPDDR3) { in phy_io_config()
626 } else if (params->base.dramtype == LPDDR3) { in set_ds_odt()
1392 } else if (params->base.dramtype == LPDDR3) { in data_training()
1553 if (params->base.dramtype == LPDDR3) { in set_cap_relate_config()
1640 if (params->base.dramtype == LPDDR3) in data_training_first()
2707 if (params->base.dramtype == LPDDR3) in dram_detect_cap()
2913 (dramtype == LPDDR3 && ddr_freq > 933) || in sdram_init()
2938 if (dramtype == LPDDR3) in sdram_init()
|
| A D | sdram_rk3328.c | 225 if (sdram_params->base.dramtype == LPDDR3 && cap_info->row_3_4) in set_ctl_address_map()
|
| A D | sdram_rk322x.c | 224 if (dramtype == LPDDR3) in memory_init()
|
| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | sdram.h | 13 LPDDR3 = 0x6, enumerator
|
| /u-boot/doc/device-tree-bindings/memory-controllers/ |
| A D | st,stm32mp1-ddr.txt | 1 ST,stm32mp1 DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL and DDRPHYC)
26 (DDR3/LPDDR2/LPDDR3)
104 - st,phy-reg : phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3)
|
| /u-boot/drivers/ram/stm32mp1/ |
| A D | Kconfig | 10 family: support for LPDDR2, LPDDR3 and DDR3
|
| /u-boot/arch/arm/mach-rockchip/rk3399/ |
| A D | Kconfig | 63 * 2GiB/4GiB LPDDR3 RAM
80 * 2/4GB Dual-Channel LPDDR3
|
| /u-boot/arch/arm/mach-mediatek/ |
| A D | Kconfig | 53 and several LPDDR3 and LPDDR4 options.
|
| /u-boot/board/google/ |
| A D | Kconfig | 62 LPDDR3 SDRAM. It has PCIe WiFi and Bluetooth. It also includes a
|
| /u-boot/board/vamrs/rock960_rk3399/ |
| A D | README | 37 * DRAM: 2GB/4GB LPDDR3 @ 1866MHz
|
| /u-boot/doc/device-tree-bindings/clock/ |
| A D | rockchip,rk3288-dmc.txt | 108 DRAM type (3=DDR3, 6=LPDDR3)
|
| /u-boot/arch/arm/mach-sunxi/ |
| A D | Kconfig | 425 bool "LPDDR3 with Allwinner stock configuration"
428 This option is the LPDDR3 timing used by the stock boot0 by
432 bool "LPDDR3 DRAM chips on the H6 DRAM controller"
436 This option is the LPDDR3 timing used by the stock boot0 by
463 Set the dram type, 3: DDR3, 7: LPDDR3
|
| A D | dram_sun8i_a83t.c | 447 #error Unsupported DRAM type, Please set DRAM type (3:DDR3, 7:LPDDR3) in sunxi_dram_init()
|
| /u-boot/board/hisilicon/hikey/ |
| A D | README | 7 * 1GB 800MHz LPDDR3 DRAM
|
| /u-boot/doc/device-tree-bindings/fsp/fsp2/apollolake/ |
| A D | fsp-m.txt | 70 0x2: BGA mirrored (LPDDR3 only)
|
| /u-boot/arch/arm/dts/ |
| A D | rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi | 47 6 /* LPDDR3 */
|
Completed in 32 milliseconds