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Searched refs:LREG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/riscv/cpu/
A Dmtrap.S18 #define LREG lw macro
22 #define LREG ld macro
72 LREG x1, 1 * REGBYTES(sp)
73 LREG x3, 3 * REGBYTES(sp)
74 LREG x4, 4 * REGBYTES(sp)
75 LREG x5, 5 * REGBYTES(sp)
76 LREG x6, 6 * REGBYTES(sp)
77 LREG x7, 7 * REGBYTES(sp)
78 LREG x8, 8 * REGBYTES(sp)
79 LREG x9, 9 * REGBYTES(sp)
[all …]
A Dstart.S20 #define LREG lw macro
27 #define LREG ld macro
172 LREG t2, GD_AVAILABLE_HARTS(gp)
285 LREG t5, 0(t0)
307 LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */
310 LREG t3, -(REGBYTES*3)(t1)
311 LREG t5, -(REGBYTES)(t1) /* t5 <-- addend */
322 LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */
328 LREG t3, -(REGBYTES*3)(t1)
332 LREG t0, -(REGBYTES)(t1) /* t0 <-- addend */
[all …]

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