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Searched refs:MCFSIM_SWDICR (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/m68k/include/asm/
A Dm5249.h113 #define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ macro
/u-boot/arch/m68k/cpu/mcf52x2/
A Dcpu_init.c195 mbar_writeByte(MCFSIM_SWDICR, 0x00); in cpu_init_f()
700 mbar_writeByte(MCFSIM_SWDICR, 0x00); in cpu_init_f()

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