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Searched refs:MCTL_MR1 (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sun8i_a33.h178 #define MCTL_MR1 0x40 macro
A Ddram_sun8i_a83t.h200 #define MCTL_MR1 0x40 macro
A Ddram_sun6i.h352 #define MCTL_MR1 0x4 macro
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun8i_a33.c136 writel(MCTL_MR1, &mctl_ctl->mr1); in auto_set_timing_para()
A Ddram_sun8i_a83t.c137 writel(MCTL_MR1, &mctl_ctl->mr1); in auto_set_timing_para()
A Ddram_sun6i.c125 writel(MCTL_MR1, &mctl_phy->mr1); in mctl_channel_init()

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