Searched refs:MDCNFG (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/cpu/pxa/
A D	pxa2xx.c	135 ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG); in pxa2xx_dram_init() 159 tmp |= readl(MDCNFG); in pxa2xx_dram_init() 160 writelrb(tmp, MDCNFG); in pxa2xx_dram_init()
/u-boot/arch/arm/include/asm/arch-pxa/
A D	pxa-regs.h	2286 #define MDCNFG 0x48100000 /* SDRAM Configuration Register 0 */ macro 2443 #define MDCNFG 0x48000000 /* SDRAM Configuration Register 0 */ macro
/u-boot/include/
A D	SA-1100.h	1824 #define MDCNFG /* DRAM CoNFiGuration reg. */ \ macro 1834 #define MDCNFG (io_p2v(_MDCNFG)) macro

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