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Searched refs:MISC_ENABLE_TM1 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/x86/include/asm/
A Dmsr-index.h132 #define MISC_ENABLE_TM1 BIT_ULL(3) macro
/u-boot/arch/x86/cpu/broadwell/
A Dcpu_full.c478 msr.lo |= MISC_ENABLE_TM1; in configure_misc()

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