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Searched refs:MISC_SSP1ENB (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/cpu/arm926ejs/spear/
A Dcpu.c58 periph1_clken |= MISC_SSP1ENB | MISC_SSP2ENB | MISC_SSP3ENB; in arch_cpu_init()
/u-boot/arch/arm/include/asm/arch-spear/
A Dspr_misc.h155 #define MISC_SSP1ENB 0x00000020 macro

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