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Searched refs:MMC_DDR_52 (Results 1 – 10 of 10) sorted by relevance

/u-boot/include/
A Dmmc.h69 #define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52)
611 MMC_DDR_52, enumerator
628 if (mode == MMC_DDR_52) in mmc_is_mode_ddr()
/u-boot/drivers/mmc/
A Dmmc-uclass.c243 cfg->host_caps |= MMC_CAP(MMC_DDR_52); in mmc_of_parse()
245 cfg->host_caps |= MMC_CAP(MMC_DDR_52); in mmc_of_parse()
A Dam654_sdhci.c138 [MMC_DDR_52] = {"ti,otap-del-sel-ddr52",
140 MMC_CAP(MMC_DDR_52)},
A Dsdhci.c503 case MMC_DDR_52:
658 mmc->selected_mode == MMC_DDR_52 ||
A Domap_hsmmc.c343 case MMC_DDR_52: in omap_hsmmc_io_recalibrate()
392 case MMC_DDR_52: in omap_hsmmc_set_timing()
1887 OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(MMC_DDR_52), ddr_1_8v, false);
2004 cfg->host_caps &= ~(MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_DDR_52) |
A Dmmc.c148 [MMC_DDR_52] = "MMC DDR52 (52MHz)", in mmc_mode_name()
168 [MMC_DDR_52] = 52000000, in mmc_mode2freq()
875 case MMC_DDR_52: in mmc_set_card_speed()
1875 case MMC_DDR_52: in mmc_set_lowest_voltage()
1929 .mode = MMC_DDR_52,
A Dzynq_sdhci.c63 [MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
A Dfsl_esdhc_imx.c782 case MMC_DDR_52: in esdhc_set_timing()
A Dmtk-sd.c866 if (timing == UHS_DDR50 || timing == MMC_DDR_52 || in msdc_set_mclk()
A Docteontx_hsmmc.c2498 case MMC_DDR_52: in octeontx_mmc_set_ios()
2659 case MMC_DDR_52: in octeontx_mmc_configure_delay()

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