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Searched refs:MMC_TIMING_MMC_DDR52 (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/mmc/
A Dzynq_sdhci.c212 case MMC_TIMING_MMC_DDR52: in sdhci_zynqmp_sdcardclk_set_phase()
268 case MMC_TIMING_MMC_DDR52: in sdhci_zynqmp_sampleclk_set_phase()
323 case MMC_TIMING_MMC_DDR52: in sdhci_versal_sdcardclk_set_phase()
387 case MMC_TIMING_MMC_DDR52: in sdhci_versal_sampleclk_set_phase()
519 arasan_dt_read_clk_phase(dev, MMC_TIMING_MMC_DDR52, in arasan_dt_parse_clk_phases()
A Dxenon_sdhci.c285 (priv->timing == MMC_TIMING_MMC_DDR52)) { in xenon_mmc_phy_set()
424 priv->timing = MMC_TIMING_MMC_DDR52; in xenon_sdhci_set_ios_post()
/u-boot/include/
A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro

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