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Searched refs:MMC_TIMING_UHS_SDR25 (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/mmc/
A Dzynq_sdhci.c65 [UHS_SDR25] = MMC_TIMING_UHS_SDR25,
210 case MMC_TIMING_UHS_SDR25: in sdhci_zynqmp_sdcardclk_set_phase()
266 case MMC_TIMING_UHS_SDR25: in sdhci_zynqmp_sampleclk_set_phase()
321 case MMC_TIMING_UHS_SDR25: in sdhci_versal_sdcardclk_set_phase()
385 case MMC_TIMING_UHS_SDR25: in sdhci_versal_sampleclk_set_phase()
511 arasan_dt_read_clk_phase(dev, MMC_TIMING_UHS_SDR25, in arasan_dt_parse_clk_phases()
A Dxenon_sdhci.c146 (priv->timing == MMC_TIMING_UHS_SDR25) || in xenon_mmc_phy_init()
284 (priv->timing == MMC_TIMING_UHS_SDR25) || in xenon_mmc_phy_set()
412 priv->timing = MMC_TIMING_UHS_SDR25; in xenon_sdhci_set_ios_post()
/u-boot/include/
A Dmmc.h369 #define MMC_TIMING_UHS_SDR25 4 macro

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