Searched refs:MMDC0 (Results 1 – 9 of 9) sorted by relevance
/u-boot/arch/arm/include/asm/arch-s32v234/ |
A D | mmdc.h | 9 #define MMDC0 0 macro
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/u-boot/board/aristainetos/ |
A D | nt5cc256m16cp.cfg | 34 /* in DDR3, 64-bit mode, only MMDC0 is initiated */
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/u-boot/board/freescale/s32v234evb/ |
A D | lpddr2.c | 106 case MMDC0: in config_mmdc()
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/u-boot/board/softing/vining_2000/ |
A D | imximage.cfg | 105 /* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */
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/u-boot/board/freescale/mx6sxsabreauto/ |
A D | imximage.cfg | 106 /* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */
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/u-boot/board/freescale/mx6sxsabresd/ |
A D | imximage.cfg | 111 /* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */
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/u-boot/board/seco/mx6quq7/ |
A D | mx6quq7-2g.cfg | 115 * in DDR3, 64-bit mode, only MMDC0 is init
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/u-boot/board/freescale/mx6qarm2/ |
A D | imximage_mx6dl.cfg | 130 * MMDC channels: Both MMDC0, MMDC1 195 * b. The calibration code that runs for both MMDC0 & MMDC1 should be used.
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/u-boot/arch/arm/dts/ |
A D | imx6qdl.dtsi | 1115 mmdc0: mmdc@21b0000 { /* MMDC0 */
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