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Searched refs:MR0_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_regs.h367 #define MR0_REG 0x15d0 macro
A Dddr3_training.c177 {MRS0_CMD, MR0_REG},
532 MR0_REG, data_value, in hws_ddr3_tip_init_controller()
536 MR0_REG, twr_mask_table[t_wr] << 9, in hws_ddr3_tip_init_controller()
1525 (dev_num, access_type, if_id, MR0_REG, in ddr3_tip_freq_set()

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