Searched refs:MSG_PORT_HOST_BRIDGE (Results 1 – 4 of 4) sorted by relevance
| /u-boot/arch/x86/cpu/quark/ |
| A D | quark.c | 31 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_A0000, in quark_setup_mtrr()
33 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_B0000, in quark_setup_mtrr()
37 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_64K_00000, in quark_setup_mtrr()
39 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_64K_40000, in quark_setup_mtrr()
41 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_80000, in quark_setup_mtrr()
43 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_90000, in quark_setup_mtrr()
46 msg_port_write(MSG_PORT_HOST_BRIDGE, i, in quark_setup_mtrr()
52 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM), in quark_setup_mtrr()
66 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_DEF_TYPE, in quark_setup_mtrr()
105 msg_port_write(MSG_PORT_HOST_BRIDGE, HEC_REG, in quark_setup_bars()
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| A D | dram.c | 151 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_RAM), in dram_init()
153 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_RAM), in dram_init()
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| A D | car.S | 26 mov $((MSG_PORT_HOST_BRIDGE << 16) | (HM_BOUND << 8)), %eax
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| /u-boot/arch/x86/include/asm/arch-quark/ |
| A D | quark.h | 11 #define MSG_PORT_HOST_BRIDGE 0x03 macro
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