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Searched refs:MSRCLR (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/microblaze/cpu/
A Dcache.c42 MSRCLR(0x20); in icache_disable()
55 MSRCLR(0x80); in dcache_disable()
A Dinterrupts.c33 MSRCLR(0x2); in disable_interrupts()
/u-boot/arch/microblaze/include/asm/
A Dasm.h56 #define MSRCLR(val) \ macro
73 #define MSRCLR(val) \ macro

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