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Searched refs:MSR_IA32_MISC_ENABLE (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/x86/cpu/
A Dturbo.c68 msr = msr_read(MSR_IA32_MISC_ENABLE); in turbo_get_state()
96 msr = msr_read(MSR_IA32_MISC_ENABLE); in turbo_enable()
98 msr_write(MSR_IA32_MISC_ENABLE, msr); in turbo_enable()
/u-boot/arch/x86/cpu/intel_common/
A Dcpu.c195 msr = msr_read(MSR_IA32_MISC_ENABLE); in cpu_get_burst_mode_state()
214 msr = msr_read(MSR_IA32_MISC_ENABLE); in cpu_set_burst_mode()
219 msr_write(MSR_IA32_MISC_ENABLE, msr); in cpu_set_burst_mode()
226 msr = msr_read(MSR_IA32_MISC_ENABLE); in cpu_set_eist()
231 msr_write(MSR_IA32_MISC_ENABLE, msr); in cpu_set_eist()
/u-boot/arch/x86/cpu/baytrail/
A Dcpu.c73 msr = msr_read(MSR_IA32_MISC_ENABLE); in set_max_freq()
75 msr_write(MSR_IA32_MISC_ENABLE, msr); in set_max_freq()
/u-boot/arch/x86/cpu/apollolake/
A Dcpu.c126 msr_clrsetbits_64(MSR_IA32_MISC_ENABLE, MISC_ENABLE_MWAIT, 0); in setup_core_msrs()
/u-boot/arch/x86/cpu/broadwell/
A Dcpu_full.c476 msr = msr_read(MSR_IA32_MISC_ENABLE); in configure_misc()
480 msr_write(MSR_IA32_MISC_ENABLE, msr); in configure_misc()
/u-boot/arch/x86/include/asm/
A Dmsr-index.h115 #define MSR_IA32_MISC_ENABLE 0x000001a0 macro

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