Searched refs:MTRR_PHYS_BASE_MSR (Results 1 – 6 of 6) sorted by relevance
| /u-boot/arch/x86/cpu/coreboot/ |
| A D | coreboot.c | 56 u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff; in board_final_init()
63 wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0); in board_final_init()
|
| /u-boot/arch/x86/cpu/intel_common/ |
| A D | car.S | 21 #define MTRR_PHYS_BASE_MSR(reg) (0x200 + 2 * (reg)) macro
81 movl $(MTRR_PHYS_BASE_MSR(0)), %ecx
134 movl $MTRR_PHYS_BASE_MSR(1), %ecx
149 movl $MTRR_PHYS_BASE_MSR(2), %ecx
206 movl $MTRR_PHYS_BASE_MSR(2), %ecx
|
| A D | car2.S | 59 mov $MTRR_PHYS_BASE_MSR(0), %ecx
103 mov $MTRR_PHYS_BASE_MSR(0), %ecx
119 mov $MTRR_PHYS_BASE_MSR(0), %ecx
133 mov $MTRR_PHYS_BASE_MSR(1), %ecx
|
| /u-boot/arch/x86/cpu/ |
| A D | mtrr.c | 63 wrmsrl(MTRR_PHYS_BASE_MSR(reg), start | type); in set_var_mtrr()
75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
278 wrmsrl(MTRR_PHYS_BASE_MSR(oper->reg), oper->base); in mtrr_do_oper()
|
| A D | mp_init.c | 315 msr_entry = save_msr(MTRR_PHYS_BASE_MSR(i), msr_entry); in save_bsp_msrs()
|
| /u-boot/arch/x86/include/asm/ |
| A D | mtrr.h | 32 #define MTRR_PHYS_BASE_MSR(reg) (0x200 + 2 * (reg)) macro
|
Completed in 10 milliseconds