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Searched refs:MXC_CCM_CCGR3_LDB_DI0_MASK (Results 1 – 17 of 17) sorted by relevance

/u-boot/board/tbs/tbs2910/
A Dtbs2910.c133 reg &= ~MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
148 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
/u-boot/board/ge/bx50v3/
A Dbx50v3.c220 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_b850v3()
266 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_bx50v3()
/u-boot/board/engicam/imx6q/
A Dimx6q.c151 reg |= (MXC_CCM_CCGR3_LDB_DI0_MASK | 0xffff); in setup_display()
/u-boot/board/solidrun/mx6cuboxi/
A Dmx6cuboxi.c236 clrbits_le32(&ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
249 setbits_le32(&ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
/u-boot/board/kosagi/novena/
A Dvideo.c397 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_clock()
/u-boot/board/technexion/pico-imx6/
A Dpico-imx6.c253 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK; in setup_display()
/u-boot/board/ge/b1x5v2/
A Db1x5v2.c292 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
/u-boot/board/advantech/dms-ba16/
A Ddms-ba16.c415 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
/u-boot/board/embest/mx6boards/
A Dmx6boards.c475 MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
/u-boot/board/freescale/mx6sabresd/
A Dmx6sabresd.c421 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK; in setup_display()
/u-boot/board/freescale/mx6sabreauto/
A Dmx6sabreauto.c446 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK; in setup_display()
/u-boot/board/toradex/colibri_imx6/
A Dcolibri_imx6.c511 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
/u-boot/board/toradex/apalis_imx6/
A Dapalis_imx6.c604 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
/u-boot/board/boundary/nitrogen6x/
A Dnitrogen6x.c718 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
/u-boot/arch/arm/include/asm/arch-mx6/
A Dcrm_regs.h820 #define MXC_CCM_CCGR3_LDB_DI0_MASK (3 << MXC_CCM_CCGR3_LDB_DI0_OFFSET) macro
/u-boot/board/congatec/cgtqmx6eval/
A Dcgtqmx6eval.c646 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK | in setup_display()
/u-boot/board/gateworks/gw_ventana/
A Dgw_ventana.c469 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()

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