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Searched refs:MXC_CCM_CCGR_CG_MASK (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/mach-imx/mx5/
A Dclock.c94 MXC_CCM_CCGR2_USBOH3_60M(MXC_CCM_CCGR_CG_MASK), in enable_usboh3_clk()
110 mask = MXC_CCM_CCGR_CG_MASK << in enable_i2c_clk()
131 MXC_CCM_CCGR2_USB_PHY(MXC_CCM_CCGR_CG_MASK), in enable_usb_phy1_clk()
145 MXC_CCM_CCGR4_USB_PHY1(MXC_CCM_CCGR_CG_MASK), in enable_usb_phy1_clk()
154 MXC_CCM_CCGR4_USB_PHY2(MXC_CCM_CCGR_CG_MASK), in enable_usb_phy2_clk()
749 MXC_CCM_CCGR5_EMI_ENFC(MXC_CCM_CCGR_CG_MASK), in enable_nfc_clk()
/u-boot/arch/arm/mach-imx/mx6/
A Dclock.c144 mask = MXC_CCM_CCGR_CG_MASK << (bus_num * 2 + 2); in enable_usdhc_clk()
165 mask = MXC_CCM_CCGR_CG_MASK in enable_i2c_clk()
204 mask = MXC_CCM_CCGR_CG_MASK << (spi_num << 1); in enable_spi_clk()
/u-boot/drivers/video/imx/
A Dipu_common.c166 reg |= MXC_CCM_CCGR_CG_MASK << clk->enable_shift; in clk_ipu_enable()
188 reg &= ~(MXC_CCM_CCGR_CG_MASK << clk->enable_shift); in clk_ipu_disable()
/u-boot/arch/arm/include/asm/arch-mx5/
A Dcrm_regs.h319 #define MXC_CCM_CCGR_CG_MASK 0x3 macro
/u-boot/arch/arm/include/asm/arch-mx6/
A Dcrm_regs.h658 #define MXC_CCM_CCGR_CG_MASK 3 macro

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