MXC_CCM_CCSR_PLL3_SW_CLK_SEL (reference) in projects: u-boot

Searched refs:MXC_CCM_CCSR_PLL3_SW_CLK_SEL (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-imx/mx5/
A D	clock.c	`677 writel(ccsr \| MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk() 683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()`
/u-boot/arch/arm/mach-imx/mx6/
A D	clock.c	`1443 reg \|= MXC_CCM_CCSR_PLL3_SW_CLK_SEL; in select_ldb_di_clock_source() 1470 reg &= ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL; in select_ldb_di_clock_source()`
/u-boot/arch/arm/include/asm/arch-mx5/
A D	crm_regs.h	`104 #define MXC_CCM_CCSR_PLL3_SW_CLK_SEL 0x1 macro`
/u-boot/arch/arm/include/asm/arch-mx6/
A D	crm_regs.h	`235 #define MXC_CCM_CCSR_PLL3_SW_CLK_SEL (1 << 0) macro`

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