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Searched refs:MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK (Results 1 – 14 of 14) sorted by relevance

/u-boot/board/engicam/imx6q/
A Dimx6q.c156 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | in setup_display()
/u-boot/board/kosagi/novena/
A Dvideo.c401 MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK, in setup_display_clock()
/u-boot/board/technexion/pico-imx6/
A Dpico-imx6.c258 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK in setup_display()
/u-boot/board/aristainetos/
A Daristainetos.c168 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK in enable_lvds()
/u-boot/board/embest/mx6boards/
A Dmx6boards.c479 MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK, in setup_display()
/u-boot/board/freescale/mx6sabresd/
A Dmx6sabresd.c426 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK in setup_display()
/u-boot/arch/arm/mach-imx/mx6/
A Dclock.c1455 | MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK); in select_ldb_di_clock_source()
1463 | MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK); in select_ldb_di_clock_source()
/u-boot/board/freescale/mx6sabreauto/
A Dmx6sabreauto.c451 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | in setup_display()
/u-boot/board/toradex/colibri_imx6/
A Dcolibri_imx6.c516 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK in setup_display()
/u-boot/board/toradex/apalis_imx6/
A Dapalis_imx6.c609 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK in setup_display()
/u-boot/board/boundary/nitrogen6x/
A Dnitrogen6x.c723 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK in setup_display()
/u-boot/arch/arm/include/asm/arch-mx6/
A Dcrm_regs.h448 #define MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK (0x7 << 9) macro
/u-boot/board/congatec/cgtqmx6eval/
A Dcgtqmx6eval.c651 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | in setup_display()
/u-boot/board/gateworks/gw_ventana/
A Dgw_ventana.c474 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK in setup_display()

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