Searched refs:MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET (Results 1 – 12 of 12) sorted by relevance
159 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
261 | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
1448 reg |= ((7 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET) in select_ldb_di_clock_source()1456 reg |= ((4 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET) in select_ldb_di_clock_source()1464 reg |= ((clk << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET) in select_ldb_di_clock_source()
171 | (0 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in enable_lvds()
429 | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
454 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
519 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
612 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
726 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
447 #define MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET 12 macro
654 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
477 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
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