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Searched refs:MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET (Results 1 – 12 of 12) sorted by relevance

/u-boot/board/engicam/imx6q/
A Dimx6q.c159 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/board/technexion/pico-imx6/
A Dpico-imx6.c261 | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/arch/arm/mach-imx/mx6/
A Dclock.c1448 reg |= ((7 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET) in select_ldb_di_clock_source()
1456 reg |= ((4 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET) in select_ldb_di_clock_source()
1464 reg |= ((clk << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET) in select_ldb_di_clock_source()
/u-boot/board/aristainetos/
A Daristainetos.c171 | (0 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in enable_lvds()
/u-boot/board/freescale/mx6sabresd/
A Dmx6sabresd.c429 | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/board/freescale/mx6sabreauto/
A Dmx6sabreauto.c454 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/board/toradex/colibri_imx6/
A Dcolibri_imx6.c519 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/board/toradex/apalis_imx6/
A Dapalis_imx6.c612 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/board/boundary/nitrogen6x/
A Dnitrogen6x.c726 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/arch/arm/include/asm/arch-mx6/
A Dcrm_regs.h447 #define MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET 12 macro
/u-boot/board/congatec/cgtqmx6eval/
A Dcgtqmx6eval.c654 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()
/u-boot/board/gateworks/gw_ventana/
A Dgw_ventana.c477 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); in setup_display()

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