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Searched refs:MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_RD (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx5/
A Dcrm_regs.h282 #define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_RD(r) (((r) >> 19) & 0x7) macro
/u-boot/arch/arm/mach-imx/mx5/
A Dclock.c400 podf = MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_RD(cscdr1); in get_esdhc_clk()

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