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Searched refs:NDBDR0 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-pxa/
A Dpxa-regs.h2341 #define NDBDR0 0x4310001C /* Data Controller Bad Block Register 0 */ macro
/u-boot/drivers/mtd/nand/raw/
A Dpxa3xx_nand.c55 #define NDBDR0 (0x1C) /* Bad Block Register 0 */ macro

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