Home
last modified time | relevance | path

Searched refs:NDSR (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/mtd/nand/raw/
A Dpxa3xx_nand.c53 #define NDSR (0x14) /* Status Register */ macro
595 nand_writel(info, NDSR, NDSR_MASK); in pxa3xx_nand_start()
625 while (!(nand_readl(info, NDSR) & NDSR_RDDREQ)) { in drain_fifo()
695 nand_writel(info, NDSR, NDSR_WRDREQ | NDSR_RDDREQ); in pxa3xx_nand_irq_thread()
715 status = nand_readl(info, NDSR); in pxa3xx_nand_irq()
758 nand_writel(info, NDSR, status); in pxa3xx_nand_irq()
1105 status = nand_readl(info, NDSR); in nand_cmdfunc()
1198 status = nand_readl(info, NDSR); in nand_cmdfunc_extended()
1444 status = nand_readl(info, NDSR); in pxa3xx_nand_waitfunc()
/u-boot/arch/arm/include/asm/arch-pxa/
A Dpxa-regs.h2339 #define NDSR 0x43100014 /* Data Controller Status Register */ macro

Completed in 19 milliseconds