Searched refs:NPLL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | xlnx-versal-clk.h | 23 #define NPLL 14 macro
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | cru_rk3368.h | 20 NPLL, enumerator
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| A D | cru_px30.h | 27 NPLL, enumerator
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_px30.c | 762 parent = rkclk_pll_get_rate(&cru->pll[NPLL], &cru->mode, NPLL); in px30_vop_get_clk()
806 npll_hz = px30_clk_get_pll_rate(priv, NPLL); in px30_vop_set_clk()
821 rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, in px30_vop_set_clk()
1067 pll_rate = px30_clk_get_pll_rate(priv, NPLL); in px30_mac_set_clk()
1183 rate = px30_clk_get_pll_rate(priv, NPLL); in px30_clk_get_rate()
1263 ret = px30_clk_set_pll_rate(priv, NPLL, rate); in px30_clk_set_rate()
1400 npll_hz = px30_clk_get_pll_rate(priv, NPLL); in px30_clk_init()
1402 ret = px30_clk_set_pll_rate(priv, NPLL, NPLL_HZ); in px30_clk_init()
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