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Searched refs:NUM_SYS_CLKS (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap5/
A Dhw_data.c31 static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {
42 static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
53 core_dpll_params_2128mhz_ddr532[NUM_SYS_CLKS] = {
64 core_dpll_params_2128mhz_ddr532_es2[NUM_SYS_CLKS] = {
75 core_dpll_params_2128mhz_dra7xx[NUM_SYS_CLKS] = {
85 static const struct dpll_params per_dpll_params_768mhz[NUM_SYS_CLKS] = {
125 static const struct dpll_params iva_dpll_params_2330mhz[NUM_SYS_CLKS] = {
148 abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = {
168 abe_dpll_params_sysclk2_361267khz[NUM_SYS_CLKS] = {
178 static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = {
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A Dhwinit.c189 static const struct srcomp_params srcomp_parameters[NUM_SYS_CLKS] = {
/u-boot/arch/arm/mach-omap2/omap4/
A Dhw_data.c39 static const struct dpll_params mpu_dpll_params_1400mhz[NUM_SYS_CLKS] = {
54 static const struct dpll_params mpu_dpll_params_1600mhz[NUM_SYS_CLKS] = {
68 static const struct dpll_params mpu_dpll_params_1200mhz[NUM_SYS_CLKS] = {
80 static const struct dpll_params core_dpll_params_1600mhz[NUM_SYS_CLKS] = {
91 static const struct dpll_params core_dpll_params_es1_1524mhz[NUM_SYS_CLKS] = {
103 core_dpll_params_es2_1600mhz_ddr200mhz[NUM_SYS_CLKS] = {
113 static const struct dpll_params per_dpll_params_1536mhz[NUM_SYS_CLKS] = {
123 static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {
136 abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = {
152 static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = {
/u-boot/arch/arm/include/asm/
A Domap_common.h15 #define NUM_SYS_CLKS 7 macro

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