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Searched refs:NUM_TX_DESC (Results 1 – 9 of 9) sorted by relevance

/u-boot/drivers/net/
A Drtl8169.c89 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
322 DEFINE_ALIGN_BUFFER(u8, txb, NUM_TX_DESC * RX_BUF_SIZE, RTL8169_ALIGN);
341 unsigned char *Tx_skbuff[NUM_TX_DESC];
618 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send_common()
647 if (entry != (NUM_TX_DESC - 1)) { in rtl_send_common()
823 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
826 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
1114 tpc->TxDescArray = rtl_alloc_descs(NUM_TX_DESC); in rtl_init()
A Ddc2114x.c85 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
101 struct de4x5_desc tx_ring[NUM_TX_DESC] __aligned(32);
326 priv->tx_new = (priv->tx_new + 1) % NUM_TX_DESC; in send_setup_frame()
370 priv->tx_new = (priv->tx_new + 1) % NUM_TX_DESC; in dc21x4x_send_common()
423 for (i = 0; i < NUM_TX_DESC; i++) { in dc21x4x_init_common()
431 priv->tx_ring_size = NUM_TX_DESC; in dc21x4x_init_common()
A Dmt7628-eth.c123 #define NUM_TX_DESC 4 macro
415 idx = (idx + 1) % NUM_TX_DESC; in mt7628_eth_send()
492 for (i = 0; i < NUM_TX_DESC; i++) { in mt7628_eth_start()
514 writel(NUM_TX_DESC, base + TX_MAX_CNT0); in mt7628_eth_start()
586 sizeof(*priv->tx_ring) * NUM_TX_DESC)); in mt7628_eth_probe()
A Deepro100.c182 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
202 struct eepro100_txfd tx_ring[NUM_TX_DESC];
390 memset(tx_ring, 0, sizeof(*tx_ring) * NUM_TX_DESC); in purge_tx_ring()
394 (sizeof(*tx_ring) * NUM_TX_DESC)); in purge_tx_ring()
592 priv->tx_next = ((priv->tx_next + 1) % NUM_TX_DESC); in eepro100_init_common()
613 priv->tx_next = ((priv->tx_next + 1) % NUM_TX_DESC); in eepro100_init_common()
651 priv->tx_next = (priv->tx_next + 1) % NUM_TX_DESC; in eepro100_send_common()
A Dmt7620-eth.c267 #define NUM_TX_DESC 64 macro
812 memset(priv->tx_ring, 0, NUM_TX_DESC * sizeof(struct pdma_tx_desc)); in mt7620_eth_fifo_init()
814 memset(priv->pkt_buf, 0, (NUM_TX_DESC + NUM_RX_DESC) * PKTSIZE_ALIGN); in mt7620_eth_fifo_init()
821 for (i = 0; i < NUM_TX_DESC; i++) { in mt7620_eth_fifo_init()
836 pdma_write(priv, TX_MAX_CNT0, NUM_TX_DESC); in mt7620_eth_fifo_init()
915 priv->tx_cpu_owner_idx0 = (priv->tx_cpu_owner_idx0 + 1) % NUM_TX_DESC; in mt7620_eth_send()
969 NUM_TX_DESC * sizeof(struct pdma_tx_desc)); in mt7620_eth_alloc_rings_pkts()
983 (NUM_TX_DESC + NUM_RX_DESC) * PKTSIZE_ALIGN); in mt7620_eth_alloc_rings_pkts()
A Dmtk_eth.c32 #define NUM_TX_DESC 24 macro
34 #define TX_TOTAL_BUF_SIZE (NUM_TX_DESC * PKTSIZE_ALIGN)
1192 memset(priv->tx_ring_noc, 0, NUM_TX_DESC * sizeof(struct pdma_txdesc)); in mtk_eth_fifo_init()
1202 for (i = 0; i < NUM_TX_DESC; i++) { in mtk_eth_fifo_init()
1219 mtk_pdma_write(priv, TX_MAX_CNT_REG(0), NUM_TX_DESC); in mtk_eth_fifo_init()
1315 priv->tx_cpu_owner_idx0 = (priv->tx_cpu_owner_idx0 + 1) % NUM_TX_DESC; in mtk_eth_send()
1379 noncached_alloc(sizeof(struct pdma_txdesc) * NUM_TX_DESC, in mtk_eth_probe()
A Drtl8139.c92 #define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */ macro
428 priv->cur_tx = (priv->cur_tx + 1) % NUM_TX_DESC; in rtl8139_send_common()
A Dsh_eth.c120 if (port_info->tx_desc_cur >= port_info->tx_desc_base + NUM_TX_DESC) in sh_eth_send_common()
199 u32 alloc_desc_size = NUM_TX_DESC * sizeof(struct tx_desc_s); in sh_eth_tx_desc_init()
223 for (cur_tx_desc = port_info->tx_desc_base, i = 0; i < NUM_TX_DESC; in sh_eth_tx_desc_init()
A Dsh_eth.h46 #define NUM_TX_DESC 8 macro

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