Searched refs:OPCODE_REG0_REG (Results 1 – 3 of 3) sorted by relevance
| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | mv_ddr_regs.h | 25 #define OPCODE_REG0_REG(obj) (OPCODE_REG0_BASE + (obj) * 0x4) macro
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| A D | ddr3_training_leveling.c | 127 OPCODE_REG0_REG(1), data, mask)); in ddr3_tip_dynamic_read_leveling()
499 OPCODE_REG0_REG(1), data, mask)); in ddr3_tip_dynamic_per_bit_read_leveling()
1480 OPCODE_REG0_REG(1), (0x3 << 25), (0x3ffff << 9))); in ddr3_tip_dynamic_write_leveling_seq()
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| A D | ddr3_training_ip_engine.c | 444 (dev_num, access_type, interface_num, OPCODE_REG0_REG(1), in ddr3_tip_ip_training()
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