Home
last modified time | relevance | path

Searched refs:PAD_CFG0_RX_DISABLE (Results 1 – 4 of 4) sorted by relevance

/u-boot/drivers/gpio/
A Dintel_gpio.c35 PAD_CFG0_RX_DISABLE, in intel_gpio_direction_input()
52 PAD_CFG0_MODE_GPIO | PAD_CFG0_RX_DISABLE | in intel_gpio_direction_output()
67 rx_tx = reg & (PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE); in intel_gpio_get_value()
70 else if (rx_tx == PAD_CFG0_RX_DISABLE) in intel_gpio_get_value()
100 rx_tx = reg & (PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE); in intel_gpio_get_function()
103 else if (rx_tx == PAD_CFG0_RX_DISABLE) in intel_gpio_get_function()
/u-boot/arch/x86/include/asm/
A Dintel_pinctrl_defs.h19 #define PAD_CFG0_RX_DISABLE (1 << 9) macro
198 PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_RX_DISABLE | !!val, \
204 PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_RX_DISABLE | !!val, \
210 PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_RX_DISABLE | !!val, \
217 PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_RX_DISABLE | !!val, \
237 PAD_CFG0_RX_DISABLE, \
244 PAD_CFG0_RX_DISABLE, PAD_PULL(pull) | \
262 PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE, \
/u-boot/drivers/pinctrl/intel/
A Dpinctrl.c327 PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE | PAD_CFG0_MODE_MASK |
/u-boot/arch/x86/dts/
A Dchromebook_coral.dts661 PAD_CFG0_RX_DISABLE | 0)

Completed in 7 milliseconds