PAD_CFG0_TX_DISABLE (reference) in projects: u-boot

Searched refs:PAD_CFG0_TX_DISABLE (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/x86/include/asm/
A D	intel_pinctrl_defs.h	18 #define PAD_CFG0_TX_DISABLE (1 << 8) macro 223 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE, \ 231 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE, \ 236 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE \| \ 243 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE \| \ 250 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE \| \ 262 PAD_CFG0_TX_DISABLE \| PAD_CFG0_RX_DISABLE, \ 268 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE \| \ 275 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE \| \ 296 PAD_FUNC(GPIO) \| PAD_RESET(rst) \| PAD_CFG0_TX_DISABLE \| \ [all …]
/u-boot/drivers/gpio/
A D	intel_gpio.c	`36 PAD_CFG0_MODE_GPIO \| PAD_CFG0_TX_DISABLE); in intel_gpio_direction_input() 51 PAD_CFG0_TX_DISABLE \| PAD_CFG0_TX_STATE, in intel_gpio_direction_output() 67 rx_tx = reg & (PAD_CFG0_TX_DISABLE \| PAD_CFG0_RX_DISABLE); in intel_gpio_get_value() 68 if (rx_tx == PAD_CFG0_TX_DISABLE) in intel_gpio_get_value() 100 rx_tx = reg & (PAD_CFG0_TX_DISABLE \| PAD_CFG0_RX_DISABLE); in intel_gpio_get_function() 101 if (rx_tx == PAD_CFG0_TX_DISABLE) in intel_gpio_get_function()`
/u-boot/drivers/pinctrl/intel/
A D	pinctrl.c	`327 PAD_CFG0_TX_DISABLE \| PAD_CFG0_RX_DISABLE \| PAD_CFG0_MODE_MASK \|`
/u-boot/arch/x86/dts/
A D	chromebook_coral.dts	`650 PAD_CFG0_TX_DISABLE \| PAD_CFG0_ROUTE_IOAPIC \|`

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