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Searched refs:PAD_CFG_PHY_REG (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_regs.h434 #define PAD_CFG_PHY_REG 0xa8 macro
A Dmv_ddr_plat.c1420 PAD_CFG_PHY_REG, in ddr3_tip_configure_phy()
1427 PAD_CFG_PHY_REG, 0x4, 0x7)); in ddr3_tip_configure_phy()
A Dddr3_debug.c625 PAD_CFG_PHY_REG, in ddr3_tip_print_stability_log()

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