PAD_CTL_DSE6 (reference) in projects: u-boot

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Searched refs:PAD_CTL_DSE6 (Results 1 – 17 of 17) sorted by relevance

/u-boot/board/beacon/imx8mn/
A D	spl.c	`71 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 72 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE) 73 #define PWM1_PAD_CTRL (PAD_CTL_FSEL2 \| PAD_CTL_DSE6)`
/u-boot/board/phytec/phycore_imx8mp/
A D	spl.c	`36 #define I2C_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE \| PAD_CTL_PE) 79 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 80 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE)`
/u-boot/board/google/imx8mq_phanbell/
A D	imx8mq_phanbell.c	`27 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 29 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE)`
A D	spl.c	`57 #define USDHC_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE \| \`
/u-boot/board/freescale/imx8mq_evk/
A D	imx8mq_evk.c	`32 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 34 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE)`
A D	spl.c	`45 #define I2C_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE) 81 #define USDHC_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE \| \`
/u-boot/board/freescale/imx8mn_evk/
A D	spl.c	`65 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 66 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE)`
/u-boot/board/phytec/phycore_imx8mm/
A D	spl.c	`67 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 68 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE)`
/u-boot/board/freescale/imx8mp_evk/
A D	imx8mp_evk.c	`23 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 24 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE)`
A D	spl.c	`50 #define I2C_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE \| PAD_CTL_PE)`
/u-boot/board/beacon/imx8mm/
A D	spl.c	`62 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 63 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE)`
/u-boot/board/freescale/imx8mm_evk/
A D	spl.c	`67 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 68 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE)`
/u-boot/board/technexion/pico-imx8mq/
A D	pico-imx8mq.c	`30 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 32 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE)`
A D	spl.c	`116 #define USDHC_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_HYS \| PAD_CTL_PUE \| \`
/u-boot/board/gateworks/venice/
A D	spl.c	`60 #define UART_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_FSEL1) 61 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE)`
/u-boot/board/toradex/verdin-imx8mm/
A D	spl.c	`79 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 \| PAD_CTL_ODE \| PAD_CTL_PUE \| PAD_CTL_PE)`
/u-boot/arch/arm/include/asm/mach-imx/
A D	iomux-v3.h	`96 #define PAD_CTL_DSE6 (0x6 << 0) macro`

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