PAD_CTL_DSE_3P3V_49OHM (reference) in projects: u-boot

Searched refs:PAD_CTL_DSE_3P3V_49OHM (Results 1 – 7 of 7) sorted by relevance

/u-boot/board/toradex/colibri_imx7/
A D	colibri_imx7.c	`39 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| \ 42 #define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM \| PAD_CTL_DSE_3P3V_49OHM) 45 #define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM \| PAD_CTL_DSE_3P3V_49OHM) 48 PAD_CTL_DSE_3P3V_49OHM) 50 #define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| PAD_CTL_SRE_SLOW \| PAD_CTL_HYS) 52 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM \| PAD_CTL_PUS_PU5KOHM)`
/u-boot/board/freescale/mx7dsabresd/
A D	mx7dsabresd.c	`31 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| \ 35 PAD_CTL_DSE_3P3V_49OHM) 37 #define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| PAD_CTL_SRE_SLOW \| PAD_CTL_HYS) 40 (PAD_CTL_HYS \| PAD_CTL_DSE_3P3V_49OHM \| PAD_CTL_SRE_FAST) 42 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM \| PAD_CTL_PUS_PU5KOHM)`
/u-boot/board/compulab/cl-som-imx7/
A D	mux.c	`41 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| \ 96 #define ENET_PAD_CTRL (PAD_CTL_PUS_PD100KOHM \| PAD_CTL_DSE_3P3V_49OHM)`
/u-boot/board/novtech/meerkat96/
A D	meerkat96.c	`20 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| \`
/u-boot/board/warp7/
A D	warp7.c	`30 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| PAD_CTL_PUS_PU100KOHM \| \`
/u-boot/board/technexion/pico-imx7d/
A D	pico-imx7d.c	`27 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM \| \`
/u-boot/arch/arm/include/asm/mach-imx/
A D	iomux-v3.h	`123 #define PAD_CTL_DSE_3P3V_49OHM (0x1<<0) macro`

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