| /u-boot/board/liebherr/display5/ |
| A D | common.h | 10 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
14 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
18 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
26 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
31 #define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
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| /u-boot/board/menlo/m53menlo/ |
| A D | m53menlo.c | 101 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
103 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
105 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
108 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
110 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
116 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
118 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
120 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
122 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
124 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
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| /u-boot/board/gateworks/gw_ventana/ |
| A D | common.h | 18 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
22 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
26 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
38 #define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/arch/arm/include/asm/mach-imx/ |
| A D | iomux-v3.h | 148 #define PAD_CTL_PUE (1 << 13 | PAD_CTL_PKE)
149 #define PAD_CTL_PKE (1 << 12) macro
209 #define PAD_CTL_PKE (1 << 3) macro
210 #define PAD_CTL_PUE (1 << 2 | PAD_CTL_PKE)
222 #define PAD_CTL_PKE (1 << 7) macro
223 #define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE)
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| /u-boot/board/freescale/mx53evk/ |
| A D | mx53evk.c | 125 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
127 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
132 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
134 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
136 PAD_CTL_HYS | PAD_CTL_PKE), in setup_iomux_fec()
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| /u-boot/board/freescale/mx6sxsabresd/ |
| A D | mx6sxsabresd.c | 36 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
40 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
51 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
55 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
57 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
|
| /u-boot/board/kosagi/novena/ |
| A D | novena_spl.c | 33 (PAD_CTL_PKE | PAD_CTL_PUE | \
38 (PAD_CTL_PKE | PAD_CTL_PUE | \
43 (PAD_CTL_PKE | PAD_CTL_PUE | \
48 (PAD_CTL_PKE | PAD_CTL_PUE | \
52 (PAD_CTL_PKE | PAD_CTL_PUE | \
61 (PAD_CTL_PKE | PAD_CTL_PUE | \
67 (PAD_CTL_PKE | PAD_CTL_PUE | \
|
| /u-boot/board/ccv/xpress/ |
| A D | xpress.c | 34 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
38 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
42 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
56 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
59 #define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/freescale/mx6ul_14x14_evk/ |
| A D | mx6ul_14x14_evk.c | 38 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
42 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
52 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
59 #define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
128 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/softing/vining_2000/ |
| A D | vining_2000.c | 42 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
45 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PKE | \
51 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | \
56 PAD_CTL_PKE | PAD_CTL_ODE | PAD_CTL_SPEED_MED | \
63 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_80ohm | \
67 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_80ohm)
70 PAD_CTL_PKE)
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| /u-boot/board/technexion/pico-imx6ul/ |
| A D | pico-imx6ul.c | 31 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
35 #define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
43 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
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| /u-boot/board/udoo/neo/ |
| A D | neo.c | 48 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
52 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
56 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
68 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
71 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
74 #define BOARD_DETECT_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/freescale/mx6sxsabreauto/ |
| A D | mx6sxsabreauto.c | 36 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
47 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
50 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
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| /u-boot/board/grinn/liteboard/ |
| A D | board.c | 35 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
39 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/variscite/dart_6ul/ |
| A D | spl.c | 17 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
113 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/myir/mys_6ulx/ |
| A D | mys_6ulx.c | 31 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/somlabs/visionsom-6ull/ |
| A D | visionsom-6ull.c | 31 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/freescale/mx51evk/ |
| A D | mx51evk_video.c | 58 PAD_CTL_PKE | PAD_CTL_DSE_MAX | PAD_CTL_SRE_SLOW)); in setup_iomux_lcd()
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| /u-boot/board/logicpd/imx6/ |
| A D | imx6logic.c | 34 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
38 #define NAND_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/freescale/mx6ullevk/ |
| A D | mx6ullevk.c | 27 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/freescale/mx6sllevk/ |
| A D | mx6sllevk.c | 27 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /u-boot/board/engicam/imx6ul/ |
| A D | imx6ul.c | 26 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
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| /u-boot/board/tqc/tqma6/ |
| A D | tqma6_wru4.c | 42 PAD_CTL_PKE | \
144 PAD_CTL_PKE | \
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| /u-boot/arch/arm/include/asm/arch-mx5/ |
| A D | iomux-mx51.h | 29 #define MX51_ECSPI_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_HYS | \
33 #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | PAD_CTL_SRE_FAST)
35 #define MX51_PAD_CTRL_2 (PAD_CTL_PKE | PAD_CTL_HYS)
36 #define MX51_PAD_CTRL_4 (PAD_CTL_PKE | PAD_CTL_DVS | PAD_CTL_HYS)
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| /u-boot/board/warp/ |
| A D | warp.c | 43 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
|