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Searched refs:PAD_CTL_PUS_PU5KOHM (Results 1 – 5 of 5) sorted by relevance

/u-boot/board/compulab/cl-som-imx7/
A Dmux.c56 #define GPIO_PAD_CTRL (PAD_CTL_PUS_PU5KOHM | PAD_CTL_PUE | \
97 #define ENET_PAD_CTRL_MII (PAD_CTL_PUS_PU5KOHM)
A Dspl.c35 MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 | MUX_PAD_CTRL(PAD_CTL_PUS_PU5KOHM |
/u-boot/arch/arm/include/asm/mach-imx/
A Diomux-v3.h134 #define PAD_CTL_PUS_PU5KOHM ((0x1 << 5) | PAD_CTL_PUE) macro
/u-boot/board/freescale/mx7dsabresd/
A Dmx7dsabresd.c42 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM)
/u-boot/board/toradex/colibri_imx7/
A Dcolibri_imx7.c52 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM)

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