Home
last modified time | relevance | path

Searched refs:PAD_CTL_SPEED_MED (Results 1 – 25 of 60) sorted by relevance

123

/u-boot/board/liebherr/display5/
A Dcommon.h11 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
19 PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \
23 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
27 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/gateworks/gw_ventana/
A Dcommon.h19 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
27 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
31 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
35 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
39 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/barco/platinum/
A Dplatinum.h19 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
31 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
34 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
41 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/tqc/tqma6/
A Dtqma6_mba6.c35 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
50 #define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
53 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
A Dtqma6_wru4.c43 PAD_CTL_SPEED_MED | \
145 PAD_CTL_SPEED_MED | \
195 PAD_CTL_SPEED_MED | \
205 PAD_CTL_SPEED_MED | \
/u-boot/board/udoo/neo/
A Dneo.c49 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
57 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
62 PAD_CTL_SPEED_MED | \
65 #define ENET_CLK_PAD_CTRL (PAD_CTL_SPEED_MED | \
69 PAD_CTL_SPEED_MED | PAD_CTL_SRE_FAST)
71 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
75 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/freescale/mx6sxsabresd/
A Dmx6sxsabresd.c37 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
48 #define ENET_CLK_PAD_CTRL (PAD_CTL_SPEED_MED | \
55 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
57 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
/u-boot/board/seco/common/
A Dmx6.c33 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
47 PAD_CTL_SPEED_MED | \
/u-boot/board/warp/
A Dwarp.c34 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
44 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/el/el6x/
A Del6x.c43 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
51 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
54 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
57 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
59 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
63 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
/u-boot/board/embest/mx6boards/
A Dmx6boards.c47 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
59 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
62 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
65 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
68 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
71 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
/u-boot/board/compulab/cm_fx6/
A Dcommon.h12 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
/u-boot/board/freescale/mx6sxsabreauto/
A Dmx6sxsabreauto.c37 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
44 #define ENET_CLK_PAD_CTRL (PAD_CTL_SPEED_MED | \
51 #define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \
/u-boot/board/BuR/brppt2/
A Dboard.c50 PAD_CTL_SPEED_MED | PAD_CTL_DSE_48ohm | \
57 PAD_CTL_SPEED_MED | PAD_CTL_DSE_60ohm | \
61 PAD_CTL_SPEED_MED | PAD_CTL_DSE_34ohm | \
65 PAD_CTL_SPEED_MED | PAD_CTL_DSE_80ohm | \
69 PAD_CTL_SPEED_MED | PAD_CTL_DSE_60ohm | \
/u-boot/board/softing/vining_2000/
A Dvining_2000.c42 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
56 PAD_CTL_PKE | PAD_CTL_ODE | PAD_CTL_SPEED_MED | \
59 #define USDHC_CLK_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
63 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_80ohm | \
67 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_80ohm)
/u-boot/board/barco/titanium/
A Dtitanium.c30 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
36 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
39 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/advantech/dms-ba16/
A Ddms-ba16.c36 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
40 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
50 #define ENET_CLK_PAD_CTRL (PAD_CTL_SPEED_MED | \
56 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
60 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
/u-boot/board/kosagi/novena/
A Dnovena_spl.c34 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
44 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
57 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
68 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/boundary/nitrogen6x/
A Dnitrogen6x.c44 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
52 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
54 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
58 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
61 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
67 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
71 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
74 #define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
/u-boot/board/phytec/pfla02/
A Dpfla02.c39 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
47 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
49 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
53 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
61 #define NAND_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/freescale/mx6ul_14x14_evk/
A Dmx6ul_14x14_evk.c39 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
43 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
52 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
/u-boot/board/technexion/pico-imx6ul/
A Dpico-imx6ul.c32 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
43 PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
/u-boot/board/myir/mys_6ulx/
A Dmys_6ulx.c32 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/somlabs/visionsom-6ull/
A Dvisionsom-6ull.c32 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
/u-boot/board/logicpd/imx6/
A Dimx6logic.c35 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
39 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \

Completed in 24 milliseconds

123