| /u-boot/board/freescale/imx8mp_evk/ |
| A D | spl.c | 51 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
54 .i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
55 .gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
59 .i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
60 .gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
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| /u-boot/board/ccv/xpress/ |
| A D | xpress.c | 64 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
68 .i2c_mode = MX6_PAD_GPIO1_IO02__I2C1_SCL | PC,
69 .gpio_mode = MX6_PAD_GPIO1_IO02__GPIO1_IO02 | PC,
73 .i2c_mode = MX6_PAD_GPIO1_IO03__I2C1_SDA | PC,
74 .gpio_mode = MX6_PAD_GPIO1_IO03__GPIO1_IO03 | PC,
81 .i2c_mode = MX6_PAD_GPIO1_IO00__I2C2_SCL | PC,
82 .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO00 | PC,
86 .i2c_mode = MX6_PAD_GPIO1_IO01__I2C2_SDA | PC,
87 .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO01 | PC,
94 .i2c_mode = MX6_PAD_UART2_TX_DATA__I2C4_SCL | PC,
[all …]
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| /u-boot/board/phytec/phycore_imx8mp/ |
| A D | spl.c | 37 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
40 .i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
41 .gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
45 .i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
46 .gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
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| /u-boot/board/warp/ |
| A D | warp.c | 103 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
106 .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC,
107 .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC,
111 .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC,
112 .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC,
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| A D | README | 4 Required software on the host PC:
20 Connect a USB to serial adapter between the host PC and warp
22 Connect a USB cable between the OTG warp port and the host PC
|
| /u-boot/board/barco/titanium/ |
| A D | titanium.c | 65 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
69 .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
70 .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
74 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
75 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
82 .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | PC,
83 .gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | PC,
87 .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC,
88 .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC,
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| /u-boot/board/kosagi/novena/ |
| A D | novena_spl.c | 71 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
203 .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
204 .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
208 .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
209 .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC,
222 .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
223 .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
227 .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC,
228 .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
241 .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
[all …]
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| /u-boot/board/bachmann/ot1200/ |
| A D | ot1200.c | 126 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
131 .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
132 .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
136 .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC,
137 .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
145 .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
146 .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC,
150 .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
151 .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC,
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| /u-boot/board/freescale/mx6sabreauto/ |
| A D | mx6sabreauto.c | 61 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
85 .i2c_mode = MX6Q_PAD_EIM_EB2__I2C2_SCL | PC,
86 .gpio_mode = MX6Q_PAD_EIM_EB2__GPIO2_IO30 | PC,
90 .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
98 .i2c_mode = MX6DL_PAD_EIM_EB2__I2C2_SCL | PC,
103 .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
116 .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
117 .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
121 .i2c_mode = MX6Q_PAD_EIM_D18__I2C3_SDA | PC,
129 .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
[all …]
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| /u-boot/board/technexion/pico-imx7d/ |
| A D | pico-imx7d.c | 34 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
39 .i2c_mode = MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL | PC,
40 .gpio_mode = MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 | PC,
44 .i2c_mode = MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA | PC,
45 .gpio_mode = MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 | PC,
|
| /u-boot/board/freescale/imx8mq_evk/ |
| A D | spl.c | 46 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
49 .i2c_mode = IMX8MQ_PAD_I2C1_SCL__I2C1_SCL | PC,
50 .gpio_mode = IMX8MQ_PAD_I2C1_SCL__GPIO5_IO14 | PC,
54 .i2c_mode = IMX8MQ_PAD_I2C1_SDA__I2C1_SDA | PC,
55 .gpio_mode = IMX8MQ_PAD_I2C1_SDA__GPIO5_IO15 | PC,
|
| /u-boot/arch/powerpc/dts/ |
| A D | p1020rdb-pc.dts | 3 * P1020RDB-PC Device Tree Source
12 model = "fsl,P1020RDB-PC";
13 compatible = "fsl,P1020RDB-PC";
|
| A D | p1020rdb-pc_36b.dts | 3 * P1020RDB-PC (36-bit address map) Device Tree Source
12 model = "fsl,P1020RDB-PC";
13 compatible = "fsl,P1020RDB-PC";
|
| A D | p2020rdb-pc.dts | 3 * P2020RDB-PC Device Tree Source
12 model = "fsl,P2020RDB-PC";
13 compatible = "fsl,P2020RDB-PC";
|
| A D | p2020rdb-pc_36b.dts | 3 * P2020RDB-PC (36-bit address map) Device Tree Source
12 model = "fsl,P2020RDB-PC";
13 compatible = "fsl,P2020RDB-PC";
|
| /u-boot/board/gateworks/gw_ventana/ |
| A D | common.c | 94 .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
99 .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
105 .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
110 .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
116 .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
117 .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
121 .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
131 .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
136 .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
153 .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
[all …]
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| /u-boot/board/barco/platinum/ |
| A D | platinum_titanium.c | 98 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
99 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
111 .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | PC,
112 .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC,
|
| A D | platinum_picon.c | 108 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
109 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
121 .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | PC,
122 .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | PC,
|
| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| A D | README | 4 P1020MSBG-PC
5 P1020RDB-PC
7 P1021RDB-PC
9 P2020RDB-PC
11 They have similar design of P1020RDB but have DDR3 instead of DDR2. P2020RDB-PC
|
| /u-boot/board/technexion/pico-imx6/ |
| A D | README | 4 Required software on the host PC:
25 Connect a USB to serial adapter between the host PC and pico.
27 Connect a USB cable between the OTG pico port and the host PC.
63 Flash SPL and u-boot-dtb.img into the eMMC running the following commands on a PC:
|
| /u-boot/board/warp7/ |
| A D | README | 4 Required software on the host PC:
27 Connect a USB to serial adapter between the host PC and warp7
29 Connect a USB cable between the OTG warp7 port and the host PC
|
| /u-boot/arch/arm/dts/ |
| A D | rk3399-roc-pc.dts | 10 model = "Firefly ROC-RK3399-PC Board";
|
| /u-boot/configs/ |
| A D | Sinlinx_SinA31s_defconfig | 8 CONFIG_MMC3_PINS="PC"
|
| A D | parrot_r16_defconfig | 8 CONFIG_MMC2_PINS="PC"
|
| /u-boot/board/firefly/roc-pc-rk3399/ |
| A D | MAINTAINERS | 1 ROC-RK3399-PC
|