| /u-boot/board/freescale/common/ |
| A D | cds_via.c | 50 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1ff4); in mpc85xx_config_via_usbide()
81 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1dfc); in mpc85xx_config_via_power()
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| /u-boot/drivers/power/acpi_pmc/ |
| A D | pmc_emul.c | 76 case PCI_BASE_ADDRESS_1: in sandbox_pmc_emul_read_config()
109 case PCI_BASE_ADDRESS_1: { in sandbox_pmc_emul_write_config()
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| /u-boot/drivers/bios_emulator/ |
| A D | atibios.c | 388 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
394 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
401 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
455 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); in PCI_unmapBIOSImage()
464 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); in PCI_unmapBIOSImage()
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| /u-boot/drivers/misc/ |
| A D | p2sb_emul.c | 83 case PCI_BASE_ADDRESS_1: in sandbox_p2sb_emul_read_config()
116 case PCI_BASE_ADDRESS_1: { in sandbox_p2sb_emul_write_config()
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| A D | swap_case.c | 138 case PCI_BASE_ADDRESS_1: in sandbox_swap_case_read_config()
210 case PCI_BASE_ADDRESS_1: { in sandbox_swap_case_write_config()
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| /u-boot/arch/x86/cpu/intel_common/ |
| A D | p2sb.c | 68 pci_x86_write_config(pdev, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32); in p2sb_early_init()
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| /u-boot/test/dm/ |
| A D | pci.c | 275 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); in dm_test_pci_ea()
279 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); in dm_test_pci_ea()
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| /u-boot/arch/x86/cpu/apollolake/ |
| A D | cpu_spl.c | 76 pci_x86_write_config(PCH_DEV_P2SB, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32); in p2sb_enable_bar()
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| A D | pmc.c | 175 pci_x86_write_config(pmc, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32); in enable_pmcbar()
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| /u-boot/drivers/pci/ |
| A D | pci-rcar-gen2.c | 207 writel(CONFIG_SYS_SDRAM_BASE & 0xf0000000, devad + PCI_BASE_ADDRESS_1); in rcar_gen2_pci_probe()
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| A D | pcie_layerscape_ep.c | 140 writel(mask, bar_base + PCI_BASE_ADDRESS_1); in ls_pcie_ep_setup_bar()
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| A D | pcie_layerscape_rc.c | 224 dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_1); in ls_pcie_disable_bars()
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| A D | pcie_dw_ti.c | 495 writel(0x0, pci->dbi_base + PCI_BASE_ADDRESS_1); in pcie_dw_setup_host()
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| A D | pcie_dw_rockchip.c | 276 writel(0x0, rk_pcie->dbi_base + PCI_BASE_ADDRESS_1); in rk_pcie_setup_host()
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| /u-boot/drivers/net/ |
| A D | rtl8139.c | 619 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in rtl8139_initialize()
742 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); in rtl8139_probe()
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| A D | pcnet.c | 544 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &bar); in pcnet_initialize()
647 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); in pcnet_probe()
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| A D | dc2114x.c | 585 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase); in dc21x4x_initialize()
717 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); in dc2114x_probe()
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| A D | pch_gbe.c | 452 iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_1, PCI_REGION_MEM); in pch_gbe_probe()
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| A D | ns8382x.c | 322 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in ns8382x_initialize()
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| A D | uli526x.c | 219 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in uli526x_initialize()
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| /u-boot/cmd/ |
| A D | universe.c | 55 pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_1, &val); in universe_init()
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| A D | pci.c | 188 { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
205 { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
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| /u-boot/drivers/ata/ |
| A D | sata_sil3114.c | 659 pci_read_config_dword (devno, PCI_BASE_ADDRESS_1, &iobase[1]); in init_sata()
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| /u-boot/include/ |
| A D | pci.h | 201 #define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */ macro
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