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Searched refs:PCI_BASE_ADDRESS_3 (Results 1 – 10 of 10) sorted by relevance

/u-boot/board/freescale/common/
A Dcds_via.c52 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_3, 0x1fe4); in mpc85xx_config_via_usbide()
/u-boot/drivers/power/acpi_pmc/
A Dpmc_emul.c78 case PCI_BASE_ADDRESS_3: in sandbox_pmc_emul_read_config()
/u-boot/drivers/misc/
A Dp2sb_emul.c85 case PCI_BASE_ADDRESS_3: in sandbox_p2sb_emul_read_config()
A Dswap_case.c140 case PCI_BASE_ADDRESS_3: in sandbox_swap_case_read_config()
/u-boot/arch/x86/cpu/apollolake/
A Dpmc.c178 pci_x86_write_config(pmc, PCI_BASE_ADDRESS_3, 0, PCI_SIZE_32); in enable_pmcbar()
/u-boot/drivers/pci/
A Dpcie_layerscape_ep.c144 writel(0, bar_base + PCI_BASE_ADDRESS_3); in ls_pcie_ep_setup_bar()
/u-boot/test/dm/
A Dpci.c288 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_3, 0); in dm_test_pci_ea()
/u-boot/cmd/
A Dpci.c190 { "base address 3", PCI_SIZE_32, PCI_BASE_ADDRESS_3 },
/u-boot/drivers/ata/
A Dsata_sil3114.c661 pci_read_config_dword (devno, PCI_BASE_ADDRESS_3, &iobase[3]); in init_sata()
/u-boot/include/
A Dpci.h203 #define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ macro

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