Searched refs:PCI_BASE_ADDRESS_5 (Results 1 – 10 of 10) sorted by relevance
| /u-boot/drivers/power/acpi_pmc/ |
| A D | pmc_emul.c | 80 case PCI_BASE_ADDRESS_5: { in sandbox_pmc_emul_read_config()
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| /u-boot/arch/x86/cpu/broadwell/ |
| A D | sata.c | 83 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_5, ®32); in broadwell_sata_init()
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| /u-boot/drivers/misc/ |
| A D | p2sb_emul.c | 87 case PCI_BASE_ADDRESS_5: { in sandbox_p2sb_emul_read_config()
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| A D | swap_case.c | 142 case PCI_BASE_ADDRESS_5: { in sandbox_swap_case_read_config()
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| /u-boot/drivers/ata/ |
| A D | ahci.c | 454 uc_priv->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5, in ahci_init_one()
465 uc_priv->mmio_base = pci_map_bar(dev, PCI_BASE_ADDRESS_5, in ahci_init_one()
1203 base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5, in ahci_probe_scsi_pci()
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| A D | sata_sil3114.c | 663 pci_read_config_dword (devno, PCI_BASE_ADDRESS_5, &iobase[5]); in init_sata()
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| /u-boot/drivers/pci/ |
| A D | pcie_layerscape_ep.c | 148 writel(0, bar_base + PCI_BASE_ADDRESS_5); in ls_pcie_ep_setup_bar()
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| A D | pci.c | 207 for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) { in pci_hose_config_device()
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| /u-boot/cmd/ |
| A D | pci.c | 192 { "base address 5", PCI_SIZE_32, PCI_BASE_ADDRESS_5 },
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| /u-boot/include/ |
| A D | pci.h | 205 #define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */ macro
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