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Searched refs:PCI_SUBORDINATE_BUS (Results 1 – 7 of 7) sorted by relevance

/u-boot/drivers/pci/
A Dpci_auto.c182 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff); in dm_pciauto_prescan_setup_bridge()
256 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr)); in dm_pciauto_postscan_setup_bridge()
A Dpci_auto_old.c180 pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff); in pciauto_prescan_setup_bridge()
251 pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, in pciauto_postscan_setup_bridge()
A Dpci_octeontx.c178 offset <= PCI_SUBORDINATE_BUS && in octeontx_pem_read_config()
201 offset <= PCI_SUBORDINATE_BUS && in octeontx_pem_write_config()
A Dpci-rcar-gen3.c299 rcar_rmw32(dev, RCONF(PCI_SUBORDINATE_BUS), 0xff, 1); in rcar_gen3_pcie_hw_init()
/u-boot/arch/powerpc/cpu/mpc83xx/
A Dpcie.c317 out_8(hose_cfg_base + PCI_SUBORDINATE_BUS, 255); in mpc83xx_pcie_init_bus()
/u-boot/cmd/
A Dpci.c208 { "subordinate bus number", PCI_SIZE_8, PCI_SUBORDINATE_BUS },
/u-boot/include/
A Dpci.h243 #define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ macro

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