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Searched refs:PERIPH_REG (Results 1 – 10 of 10) sorted by relevance

/u-boot/arch/arm/include/asm/arch-tegra20/
A Dclock-tables.h172 #define PERIPH_REG(id) ((id) >> 5) macro
/u-boot/arch/arm/mach-tegra/tegra114/
A Dclock.c587 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable()
589 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable()
608 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
610 reset = &clkrst->crc_rst_dev_vw[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/mach-tegra/tegra30/
A Dclock.c567 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable()
569 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable()
588 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
590 reset = &clkrst->crc_rst_dev_vw[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/include/asm/arch-tegra114/
A Dclock-tables.h378 #define PERIPH_REG(id) \ macro
/u-boot/arch/arm/include/asm/arch-tegra30/
A Dclock-tables.h358 #define PERIPH_REG(id) \ macro
/u-boot/arch/arm/include/asm/arch-tegra124/
A Dclock-tables.h483 #define PERIPH_REG(id) \ macro
/u-boot/arch/arm/mach-tegra/tegra124/
A Dclock.c733 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable()
735 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable()
756 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
758 reset = &clkrst->crc_rst_dev_vw[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/include/asm/arch-tegra210/
A Dclock-tables.h553 #define PERIPH_REG(id) \ macro
/u-boot/arch/arm/mach-tegra/tegra210/
A Dclock.c825 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable()
827 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable()
851 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
853 reset = &clkrst->crc_rst_dev_vw[PERIPH_REG(periph_id)]; in reset_set_enable()
/u-boot/arch/arm/mach-tegra/tegra20/
A Dclock.c514 u32 *clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable()
531 u32 *reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()

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