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Searched refs:PHYS_SDRAM_0 (Results 1 – 9 of 9) sorted by relevance

/u-boot/include/configs/
A Dadp-ag101p.h184 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ macro
187 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ macro
189 #define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */ macro
194 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
209 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
A Dax25-ae350.h62 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ macro
64 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
67 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
A Dadp-ae3xx.h94 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ macro
97 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
102 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
A Dsunxi-common.h103 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE macro
/u-boot/board/AndesTech/adp-ae3xx/
A Dadp-ae3xx.c33 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; in board_init()
39 unsigned long sdram_base = PHYS_SDRAM_0; in dram_init()
54 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; in dram_init_banksize()
/u-boot/board/AndesTech/adp-ag101p/
A Dadp-ag101p.c36 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; in board_init()
43 unsigned long sdram_base = PHYS_SDRAM_0; in dram_init()
61 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; in dram_init_banksize()
/u-boot/board/AndesTech/ax25-ae350/
A Dax25-ae350.c31 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; in board_init()
/u-boot/board/sunxi/
A Dboard.c238 gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100); in board_init()
359 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, in dram_init()
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun4i.c691 return get_ram_size((long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE); in dramc_init_helper()

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