| /u-boot/arch/arm/mach-imx/mx5/ |
| A D | mx53_dram.c | 26 return get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); in get_effective_memsize()
31 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); in dram_init()
39 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
40 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); in dram_init_banksize()
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| /u-boot/include/configs/ |
| A D | bcm_northstar2.h | 15 #define PHYS_SDRAM_1 V2M_BASE macro
19 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
22 #define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + 0x7ff00)
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| A D | legoev3.h | 31 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ macro
60 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
65 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
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| A D | stih410-b2260.h | 13 #define PHYS_SDRAM_1 0x40000000 macro
14 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
16 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 /* default load addr */
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| A D | edb93xx.h | 121 #define PHYS_SDRAM_1 0x00000000 macro
124 #define PHYS_SDRAM_1 0xc0000000 macro
127 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
133 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
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| A D | ts4600.h | 19 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
21 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | bg0900.h | 9 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
11 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | mx23_olinuxino.h | 14 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
16 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | bcm_ns3.h | 16 #define PHYS_SDRAM_1 V2M_BASE macro
18 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
19 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x80000)
27 #define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + 0x80000000)
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| A D | sansa_fuze_plus.h | 11 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
13 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | sc_sps_1.h | 17 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
19 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | xfi3.h | 11 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
13 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | durian.h | 12 #define PHYS_SDRAM_1 0x80000000 macro
14 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | mx23evk.h | 17 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
19 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | stemmy.h | 14 #define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */ macro
15 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | stv0991.h | 12 #define PHYS_SDRAM_1 0x00000000 macro
13 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | colibri_pxa270.h | 80 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ macro
86 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
87 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | hikey960.h | 18 #define PHYS_SDRAM_1 0x00000000 macro
21 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | integrator-common.h | 64 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ macro
66 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | dragonboard820c.h | 17 #define PHYS_SDRAM_1 0x80000000 macro
22 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | mx28evk.h | 17 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
19 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | xea.h | 37 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
39 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| A D | total_compute.h | 31 #define PHYS_SDRAM_1 0x80000000 macro
35 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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| /u-boot/board/samsung/smdkc100/ |
| A D | smdkc100.c | 45 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; in board_init()
52 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); in dram_init()
59 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
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| /u-boot/board/phytium/durian/ |
| A D | durian.c | 34 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
64 .virt = (u64)PHYS_SDRAM_1,
65 .phys = (u64)PHYS_SDRAM_1,
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