| /u-boot/board/broadcom/bcmns2/ |
| A D | northstar2.c | 45 PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE); in dram_init()
52 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
54 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE; in dram_init_banksize()
|
| /u-boot/include/configs/ |
| A D | deneb.h | 16 #undef PHYS_SDRAM_1_SIZE
17 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ macro
|
| A D | giedi.h | 16 #undef PHYS_SDRAM_1_SIZE
17 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */ macro
|
| A D | apf27.h | 60 + PHYS_SDRAM_1_SIZE - 0x0100000)
250 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ macro
256 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ macro
262 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ macro
|
| A D | integrator-common.h | 65 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ macro
67 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
|
| A D | kp_imx53.h | 84 #define PHYS_SDRAM_1_SIZE (512 * SZ_1M) macro
85 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE)
|
| A D | adp-ag101p.h | 198 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ macro
202 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ macro
205 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ macro
|
| A D | socfpga_soc64_common.h | 129 #define PHYS_SDRAM_1_SIZE (1 * 1024 * 1024 * 1024) macro
201 #define CONFIG_SPL_BSS_START_ADDR (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE \
|
| A D | socfpga_arria5_socdk.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ macro
|
| A D | socfpga_cyclone5_socdk.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ macro
|
| A D | socfpga_de0_nano_soc.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ macro
|
| A D | socfpga_de10_nano.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ macro
|
| A D | socfpga_de1_soc.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ macro
|
| A D | socfpga_sockit.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ macro
|
| A D | socfpga_socrates.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCrates */ macro
|
| A D | socfpga_dbm_soc1.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ macro
|
| A D | socfpga_mcvevk.h | 11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */ macro
|
| A D | socfpga_is1.h | 12 #define PHYS_SDRAM_1_SIZE 0x10000000 macro
|
| /u-boot/board/phytium/durian/ |
| A D | durian.c | 28 gd->ram_size = PHYS_SDRAM_1_SIZE; in dram_init()
35 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
66 .size = (u64)PHYS_SDRAM_1_SIZE,
|
| /u-boot/board/armltd/total_compute/ |
| A D | total_compute.c | 53 gd->ram_size = PHYS_SDRAM_1_SIZE; in dram_init()
60 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
|
| /u-boot/board/st/stih410-b2260/ |
| A D | board.c | 21 gd->ram_size = PHYS_SDRAM_1_SIZE; in dram_init()
28 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
|
| /u-boot/board/samsung/smdkc100/ |
| A D | smdkc100.c | 52 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); in dram_init()
60 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
|
| /u-boot/board/AndesTech/adp-ag101p/ |
| A D | adp-ag101p.c | 44 unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; in dram_init()
64 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
|
| /u-boot/board/AndesTech/adp-ae3xx/ |
| A D | adp-ae3xx.c | 40 unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; in dram_init()
57 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
|
| /u-boot/board/st/stv0991/ |
| A D | stv0991.c | 95 gd->ram_size = PHYS_SDRAM_1_SIZE; in dram_init()
102 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
|