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Searched refs:PHY_BASEADDR_CLKGEN20 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-nexell/include/mach/
A Dnexell.h105 #define PHY_BASEADDR_CLKGEN20 (0xC00CD000) /* SDHC_2 */ macro
/u-boot/arch/arm/mach-nexell/
A Dclock.c155 PHY_BASEADDR_CLKGEN20, (I_PLL_0_2 | I_GATE_PCLK)),

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