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Searched refs:PIN_INPUT_SLEW (Results 1 – 4 of 4) sorted by relevance

/u-boot/board/ti/dra7xx/
A Dmux_data.h144 {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
145 {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */
338 {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
339 {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */
402 {UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */
403 {UART1_TXD, (PIN_INPUT_SLEW | M0)}, /* UART1_TXD */
404 {UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */
405 {UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */
706 {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
707 {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */
[all …]
/u-boot/board/ti/am57xx/
A Dmux_data.h70 {VIN1B_CLK1, (M14 | PIN_INPUT_SLEW)}, /* vin1b_clk1.gpio2_31 */
119 {UART3_RXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_rxd.gpio5_18 */
120 {UART3_TXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_txd.gpio5_19 */
163 {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */
198 {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */
201 {SPI2_D1, (M14 | PIN_INPUT_SLEW)}, /* spi2_d1.gpio7_15 */
658 {MDIO_MCLK, (M0 | PIN_INPUT_SLEW)}, /* mdio_mclk.mdio_mclk */
743 {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */
878 {MDIO_MCLK, (M0 | PIN_INPUT_SLEW)}, /* mdio_mclk.mdio_mclk */
963 {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */
[all …]
/u-boot/include/dt-bindings/pinctrl/
A Ddra.h66 #define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) macro
/u-boot/arch/arm/include/asm/arch-omap5/
A Dmux_dra7xx.h25 #define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) macro

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