Home
last modified time | relevance | path

Searched refs:PLL0CR (Results 1 – 7 of 7) sorted by relevance

/u-boot/board/renesas/eagle/
A Deagle.c37 #define PLL0CR 0xE61500D8 macro
54 clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); in s_init()
/u-boot/board/renesas/stout/
A Dstout.c55 clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); in s_init()
/u-boot/board/renesas/gose/
A Dgose.c49 clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); in s_init()
/u-boot/board/renesas/koelsch/
A Dkoelsch.c51 clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); in s_init()
/u-boot/board/renesas/porter/
A Dporter.c51 clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); in s_init()
/u-boot/board/renesas/lager/
A Dlager.c55 clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); in s_init()
/u-boot/arch/arm/mach-rmobile/include/mach/
A Drcar-base.h704 #define PLL0CR 0xE61500D8 macro

Completed in 12 milliseconds