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Searched refs:PLL2_CNTL_6UA (Results 1 – 2 of 2) sorted by relevance

/u-boot/board/spear/x600/
A Dfpga.c216 writel(PLL2_CNTL_6UA | PLL2_CNTL_SAMPLE | PLL2_CNTL_ENABLE | in expi_setup()
/u-boot/arch/arm/include/asm/arch-spear/
A Dspr_misc.h112 #define PLL2_CNTL_6UA 0x1c00 macro

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