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Searched refs:PLLDIG_PLLFD (Results 1 – 3 of 3) sorted by relevance

/u-boot/board/freescale/s32v234evb/
A Dclock.c116 writel(readl(PLLDIG_PLLFD(pll)) | PLLDIG_PLLFD_MFN_SET(pllfd_mfn) | in program_pll()
117 PLLDIG_PLLFD_SMDEN, PLLDIG_PLLFD(pll)); in program_pll()
/u-boot/arch/arm/include/asm/arch-s32v234/
A Dmc_cgm_regs.h94 #define PLLDIG_PLLFD(pll) ((MC_CGM0_BASE_ADDR + 0x00000030) + ((pll) * 0x80)) macro
/u-boot/arch/arm/cpu/armv8/s32v234/
A Dgeneric.c93 pllfd = readl(PLLDIG_PLLFD(pll)); in decode_pll()

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